1. Field of the Invention
The present invention relates in general to a method for manufacturing a liquid crystal display and, more particularly, to a method for manufacturing a liquid crystal display, capable of improving adhesion of a color filter substrate and an array substrate without adding a mask process, and preventing seal opening.
2. Discussion of the Related Art
Usually when cathode ray tubes are applied to display devices like televisions or computer monitors, they are heavy, large, and has much power consumption. So, it is not quite easy to install and carry them anywhere. Introduced to overcome these problems and now widely used display devices are LCD (Liquid Crystal Display) devices using liquid crystal, PDPs (Plasma Display Panel) using surface discharge, or FEDs (Field Emission Device) using electric field emission.
Among those display devices, particularly LCD devices have seen widespread commercial use because they are characterized as having low power consumption, low driving voltage, fine pitch (high definition), or full color display, which are typical features seen in cathode ray tubes. The simplified manufacturing process of LCD devices is another reason why LCD devices are applied to diverse electronic devices.
LCD devices are largely divided into transmission type LCD devices using an exterior light source, and reflection type LCD devices using natural light (e.g., sunlight).
The reflection type LCD is advantageous in that it has low power consumption, and is sufficiently thin and light not using a backlight device, yet shows excellent displays outdoors. Because of these optimal conditions, the reflection type LCD is preferred for use in a portable device.
The general reflection type LCD is basically constructed of an upper substrate to which a polarization plate is attached, a lower substrate to which a reflection plate is attached, and a liquid crystal layer inserted between the upper and lower substrates. Incident light on the upper substrate transmits the liquid crystal layer, and is reflected by the reflection plate, and transmits again the liquid crystal layer and the upper substrate in order, and finally is emitted to the outside. If light is incident upon the reflection type LCD from an exterior light source located in a particular direction, the incident light is reflected only to an opposite direction of the particular direction. As a result, viewing angle of the light to a user is narrowed. To obviate this phenomenon, manufacturers usually deposit a scattering layer on the upper substrate of the reflection type LCD to scatter the reflected light, or design the reflection plate on the lower substrate to have a uneven surface.
FIGS. 1A through 1C illustrate manufacturing processes of a LCD according to the related art. In the drawings, although a TFT portion, a gate pad portion and a data pad portion composing an array substrate look like they are all connected to one another, this is just for convenience of explanation, and in reality, as is well known, they are not connected. For instance, unlike what is shown in the drawings, the gate pad portion can be positioned on the left side of the TFT portion, and the data pad portion at an upper portion of the TFT, respectively. As aforementioned, the TFT portion, the gate pad portion and the data pad portion seem to be connected to one another in FIGS. 1A through 1C, but this is simply for having all of them on the same drawing.
As shown in FIG. 1A, gate metal is deposited on an entire area of transparent lower substrate 100, and through a photolithography process, a gate electrode 101, a gate bus line and a gate pad 101a are formed. Then a gate insulating layer 103 is deposited on the whole area of the lower substrate 100, followed by an amorphous silicon layer and a doped to amorphous silicon layer in order. The photolithography process is performed on the lower substrate 100 deposited with the doped amorphous silicon layer to form an active layer on an area where the TFT portion is supposed to be formed, the active layer including a channel layer 104 and an ohmic contact layer 105. Afterwards, a source/drain metal layer is deposited over the entire area of the lower substrate 100 on which the active layer has been formed. Next, source/drain electrodes 106a and 106b, a data bus line and a data pad 108 are formed by etching the source/drain metal layer. An organic passivation layer 107 is used to coat the whole area of the lower substrate 100. Particularly, this organic passivation layer 107 is deposited to form a uneven reflection electrode made of AlNd metal in case of the reflection type LCD. On the other hand, the organic passivation layer 107 is deposited and a pixel electrode made of ITO metal is formed in the case of a transmission type LCD.
As depicted in FIG. 1B, if the organic passivation layer 107 is coated over the entire area of the lower substrate 100, the photolithography process should be performed to expose the upper portion of each of the source/drain electrodes 106a and 106b, the gate pad 101a and the data pad 108. The organic passivation layer 107 is then removed from other areas except the gate bus line and the data bus line in a seal area, a designated portion where the gate bus line connected to the gate pad 101a contacts with a seal line. This eventually prevents seal line from opening caused by weak adhesion between the seal line and the organic passivation layer 107.
As depicted in FIG. 1C, if a contact hole is formed on the organic passivation layer 107 and the pads are exposed and the organic passivation layer is removed in other areas except for the gate bus line and the data bus line, an AlNd group metal layer is deposited over the entire area of the lower substrate 100, given that the reflection type LCD is involved, while a ITO group metal layer is deposited over the lower substrate 100 if the transmission type LCD is involved. And, through the photolithography process, the reflection electrode or pixel electrode 109, a gate pad pattern 111 and a data pad pattern 112 are formed. Here, in the case of the reflection type LCD, the reflection electrode can be formed out of the deposited AlNd group metal layer, and in the case of the transmission type LCD, the pixel electrode can be formed out of the ITO group metal layer.
FIG. 2 is an exploded plan view of the gate pad portion on the array substrate of the related art LCD device.
As shown in FIG. 2, as the organic passivation layer between gate pads is removed, the gate pad portion now has a shape of a washboard. A seal area, an area on a color filter substrate where the seal line is formed, exists on the gate link lines arrayed on a gate link line area (B) sandwiched between a gate pad area (A) and a pixel active area (C). As the organic passivation layer is removed, the adhesion between the seal line and the lower substrate can be stronger. That is, the organic passivation layer exists only over the gate link line of the seal area. Meanwhile, all of the organic passivation layer between the gate link lines, between the gate pads, and over the gate pad (pad opening) are removed. In short, the uneven shaped organic passivation layer serves to enhance the adhesion between the seal line and the lower substrate.
FIGS. 3A and 3B respectively illustrate cross-sectional views of a gate pad area and gate link line area without acryl according to one exemplary embodiment of the related art. More specifically, FIG. 3A is a cross-sectional view of the gate pad area taken along line I–I′ of FIG. 2, in which an organic passivation layer between gate pad lines is removed. FIG. 3B is a cross-sectional view of the gate link line area taken along line K–K′ in FIG. 2, in which an organic passivation layer between gate link lines is removed. One thing to notice here is that even though FIGS. 3A and 3B illustrated only two of the gate pads or the gate link lines, respectively, there are actually a great number of gate pads in the gate pad area or a great number of gate link lines in the gate link line areas.
As depicted in FIG. 3A, an organic passivation layer 203 between gate pads 210 is removed. This is done in order to prevent a seal opening by reducing a contact area between the seal line and the organic passivation layer and improving the adhesion between seal line and the organic passivation layer. In other words, opening up the gate pads, the organic passivation layer between gate pads 210 is removed, and the pad area has a uneven surface, meaning areas with the organic passivation layer thereon and areas without the organic passivation layer thereon are exhibited in turns. Another possible way to remove the organic passivation layer 203 between the gate pads 210 involves performing a patterning process while forming a contact hole thereon, and performing an etching process using the organic passivation layer 203 as a mask, the contact hole being formed on the organic passivation layer, and finally etching a buffer layer 202 and a gate insulating layer 201.
The organic passivation layer 203 between gate link lines 210a in FIG. 3B is also removed alternately. As shown, a gate insulating layer 201, a buffer layer 202, and an organic passivation layer 203 are layered in sequence on each of the gate link lines 210a. 
Hence, throughout the gate pad area and the gate link line area as shown in FIGS. 3A and 3B, no organic passivation layer is formed between gate pads and between gate link lines, thereby making a uneven structure thereon.
FIGS. 4A and 4B respectively illustrate cross-sectional views of a gate pad area and gate link line area without acryl according to another exemplary embodiment of the related art.
Originally a new structure in FIG. 4A is introduced in order to solve an outstanding problem associated with seal opening, which could not be completely overcome by the uneven pattern shown in FIGS. 3A and 3B at the absence of the organic passivation layer. In fact, the structure in FIG. 4A is derived from the gate pad portion in FIG. 2 by removing the organic passivation layer deposited from the gate pad portion (A) to the active area (C). That is, after coating the top surface of the lower substrate with the organic passivation layer, every bit of the organic passivation layer covering from the gate pad portion (A) to the active area (C) is removed by a photolithography process. Thus, when the seal line comes in contact with the organic passivation layer, it actually contacts with the areas without the organic passivation layer, and thus, the adhesion between them gets stronger.
To be more specific, when the organic passivation layer is completely removed through the photolithography process from the gate pad area (A) and the gate link line area (B) on the transparent lower substrate 200, a gate insulating layer exists on the gate pad area (A) and the gate link line area (B). Then, the gate insulating layer deposited on the gate pad area (A) and the gate link line area (B) is completely removed through an etching process, and as a result thereof, the entire gate pad and gate link line are exposed to the outside. However, a problem in this case is that all of the gate link lines can be removed by wet etching during the following process such as formation of a pixel electrode or reflection electrode.
This explains why the organic passivation layer without the contact hole is not used as a mask for removing the gate insulating layer, and only the gate pad area (A) is exposed through the special photolithography process.
If only the gate pad area (A) is exposed, either AlNd metal layer or ITO metal layer is deposited on the whole area of the lower substrate, and a gate pad pattern 225 to be in contact with the gate pad is formed while forming the reflection electrode or the pixel electrode. As such, the gate pad area (A) illustrated in FIG. 4A, wherein the gate pad pattern 225 is directly formed on the gate pad 220, is obtained.
FIG. 4B shows the structure of the gate link line area (B) where gate link lines 220a are arrayed on the transparent lower substrate 200, and the organic passivation layer between the gate link lines 220a is completely removed. In this particular case, performing a mask process for exposing the gate pad 220, the gate insulating layer 201 existing on the gate link line 220a remains as it is. In this manner, the gate link line 220a is not cut off during a pixel electrode etching process followed thereafter.
After all, once the organic passivation layer is completely removed, the adhesion between the seal line and the gate pad area in this case gets much stronger than the one in the structure shown in FIGS. 3A and 3B. So far, the adhesion between the gate pad area and the seal line has mainly been focused on, but it is also possible to enhance the adhesion between the data pad area (portion) and the seal line using the same scheme.
To summarize, first, the related art method for manufacturing a LCD device for preventing seal opening attempted to improve adhesion between the seal line and the gate pad area by manipulating the gate pad area to have a uneven pattern (i.e., washboard shape) on its surface, which is accomplished by removing the organic passivation layer between the gate pads, and between gate link lines or data pads and data link lines as illustrated in FIGS. 3A and 3B. However, because the organic passivation layer was not completely removed from the gate link lines, the seal opening problem is still outstanding, only making a Tape Automated Bonding (TAB) repair process more complicated. Especially, at a time of a light test using an automatic probe or a probe pin, the pad was often taken away and got worsen.
Secondly, when every bit of the organic passivation layer was removed as illustrated in FIGS. 4A and 4B from the gate pad area and a contact area between the gate link line area and the seal line, the removed organic passivation layer was used as a mask to remove the gate insulating layer and expose the pad. As a result, gate link lines or data link lines are all exposed to the outside, and later those lines were removed by wet etching during the following process such as formation of a pixel electrode or reflection electrode. To obviate these problems, the pad could be opened up by removing the gate insulating layer through a special photography process. However in such case, an additional mask process is required, which only makes the overall manufacturing procedure more complicated and increases the cost of manufacture.